Dessalegn A.

Dessalegn A.

Embedded Security Engineer

Hillsboro , United States

Experience: 10 Years

Dessalegn

Hillsboro , United States

Embedded Security Engineer

96000 USD / Year

  • Immediate: Available

10 Years

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About Me

Currently I am embedded Security Engineer at Intel. I am a member of connected home devices project, media software stack developed in C/C++ using yocto build system, focusing on security issues. I worked as developer in HPE for Healthcare management...

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Portfolio Projects

Description

Lately, EEG-based authentication has received considerable attention from the scientific community. However, the limited usability of wet EEG electrodes as well as low accuracy for large numbers of users have so far prevented this new technology to become commonplace. In this study a novel EEG based authentication system is presented, which is based on the RSVP paradigm and uses a knowledge-based approach for authentication. 29 subjects’ data were recorded and analyzed with wet EEG electrodes as well as dry ones. A true acceptance rate of 100?n be reached for all subjects with an average required login time of 13.5 s for wet and 27.0 s for dry electrodes. Average false acceptance rates for the dry electrode setup were estimated to be 3.33_10-5.

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Description

Privacy and intellectual rights management is becoming an important topic. The existing social network services (SNS) have many limitations in meeting consumers' expectations of their privacy and intellectual rights management. Metadata management in SNS is heterogeneous and susceptible to personal identification and copyright information misuses. There are cases where consumers are not informed in how their metadata is shared and used, while the copyrights of images are removed without the owner's consent. In this paper, we propose two metadata protection models called hierarchical and group-based model. The models are analyzed and evaluated with respect to the interest of user and services.

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Description

In transformed and compressed domain fragmented files are very difficult to recover using conventional file recovery software. JPEG images are forensically important file format due to its popularity in a wide area of applications. In JPEG compression the header keeps important parameters that are required to decode the image back to pixel domain. In this paper the detection of width and height of an image from the JPEG stream is improved with less assumptions than previous papers. In the old approaches it was assumed that information about the image like Huffman table, Reset (RST) value and Quantization table were readily available for the techniques to work. However, in this paper the width is extracted from the quantized AC values that reduce the assumptions to just Huffman table.

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Description

Image forgery detection is one of important activities of digital forensics. Forging an image has become very easy and visually confusing with the real one. Different features of an image can be used in passive forgery detection. Most of lossy compression methods demonstrate some distinct characteristics. JPEG images have a traceable zero valued DCT coefficients in the high frequency regions due to quantization. This appears as a square grid all over the image, known as Block Artifact Grid (BAG). In this paper the BAG based copy-paste forgery detection method is improved by changing the input DCT coefficients for Local Effect computation. The proposed method has shown a better performance especially for complex images

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Description

This paper presents a novel weighted sparse representation classification for face recognition with a learned distance metric (WSRC-LDM) which learns a Mahalanobis distance to calculate the weight and code the testing face. The Mahalanobis distance is learned by using the information-theoretic metric learning (ITML) which helps to define a better weight used in WSRC. In the meantime, the learned distance metric takes advantage of the classification rule of SRC which helps the proposed method classify more accurately. Extensive experiments verify the effectiveness of the proposed method.

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Description

Rijndael is adopted as Advanced Encryption Standard (AES) by the Americans National Institute of Standards and Technology since 2001. AES algorithm has a wide area of application for its good security, simple design and ease of implementation on hardware and software. A Monte Carlo Test (MCT) vector is released with AES algorithm submission to check correctness of implementations. Besides to its defined purpose, MCT is used to measure speed of execution. Very important information flows through conventional communication systems like telephone, fax and radio. In such systems, cryptographic solutions can be implemented using embedded systems. ARM is the most common embedded system processor. The challenge is to run cryptography algorithms that are computationally intensive in nature on an embedded platform with an inherent resource limitation. In this thesis, AES implementation is optimized for speed of execution on an ARM powered embedded platform. It starts by comparison of available approaches to implement for a better speed performance. Then, Key features of the ARM processor are studied and exploited on the implementation to enhance speed of execution of the algorithm.The encryption has shown a remarkable improvement than the decryption. This is because of the design complexity on AES decryption algorithm. For the communication flow control problem that might be caused by the speed imbalance of encryption and decryption, a counter mode of operation is recommended.

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