Job Title: Design for Test DFT Engineer.
5+ years industry experience required
- Experience with Hierarchical DFT Architecture.
- Experience using Synopsys or Mentor test tools.
- Experience in Scan Insertion, test Muxing, ATPG, MBist & pre/post-layout simulation.
- Expertise in Top Level DFT switching with DFT Architecture experience will add value.
- Expertise in test clock strategy & muxing required .
- Expertise in test timing constraints for shift, capture, mbist or any special mode & timing closure for these modes.
- Familiar with low power testability, state tables, and components (LS, ISO, RET).
- Familiar with JTAG for board level interconnect testing.
- Programming experience in Tcl & Perl is must.
- Involvement in flow development is a plus.